1. Field of the Invention
The present invention relates to a mounting structure and a mounting method of a semiconductor device, and a liquid crystal display device.
2. Description of the Related Art
A liquid crystal display panel is constituted of a transistor array circuit substrate on which a plurality of thin film transistors, electrodes and others are formed in a matrix form, an opposed substrate, a sealing material which couples the two substrates to each other, and a liquid crystal which is injected between the substrates. A semiconductor device (a driver device) which drives the thin film transistors is attached to the transistor array circuit substrate.
As a method of manufacturing a circuit substrate such as a transistor array circuit substrate, there is a method described in, e.g., Jpn. Pat. Appln. KOKAI Publication No. 9-80456. Specifically, an electroconductive film is formed on a substrate, a patterning is made by a photolithography method and an etching method, and an insulating film is formed to cover the patterned film. This process is repeated.
An anisotropic electroconductive binding material is used for attachment of a semiconductor device such as an LSI chip on to a circuit substrate like a transistor array circuit substrate. This anisotropic electroconductive binding material is formed of a binder resin consisting of a thermosetting resin and electroconductive particles appropriately dispersed in the binder resin. The anisotropic electroconductive binding material is sandwiched between a terminal on the circuit substrate and an electrode of the semiconductor device, and the semiconductor device is pressed from above toward the circuit substrate side and heated by heating and pressing means such as a bonding device having heating means. Thus, the binder resin is spread so that at least one electroconductive particle is sandwiched between the opposed electrodes. As a result, a part between the terminal on the circuit substrate and the electrode of the semiconductor device can be electrically conducted. On the other hand, since the electroconductive particles are appropriately dispersed in the binder resin and the binder resin is an insulating material, the binder resin has insulation properties in a plane direction. As described above, when the anisotropic electroconductive binding material is sandwiched between the opposed substrates and the semiconductor device is thermally pressed against the circuit substrate by the heating and pressing means, the circuit substrate and the semiconductor device can be joined to each other and, at the same time, the part between the terminal of the circuit substrate and the electrode of the semiconductor substrate can be electrically conducted (U.S. Pat. No. 5,748,179).
Meanwhile, in case of attaching (mounting) a semiconductor device to a circuit substrate by using an anisotropic electroconductive binding material, the binding material is disposed in a range larger than a semiconductor device attachment region on the circuit substrate while considering a dimensional tolerance at the time of forming the anisotropic electroconductive binding material, an attachment tolerance of the anisotropic electroconductive binding material and an attachment tolerance of the semiconductor device. Further, in case of thermally pressing the semiconductor device against the circuit substrate by pressing the semiconductor device from above toward the circuit substrate side and heating the same with the anisotropic electroconductive binding material being sandwiched between opposed substrates, the semiconductor device is heated by heating and pressing means to conduct heat to the anisotropic electroconductive binding material.
At this time, heat is not conducted to a position apart from the semiconductor device, and a binding resin part at this position remains unhardened. Ionic impurities and/or moisture is apt to enter this unhardened position. When such moisture or the like further enters an insulating film, the moisture is stored in a wiring line portion and functions as an oxidizer with respect to a metal forming a wiring line. As a result, such moisture can be a factor of corrosion by which a surface of the metal is ionized and lost, and this corrosion may further grow to result in disconnection. Furthermore, the insulating film tends to be strained at a boundary between a part to which heat or pressure for thermocompression is applied and an outer peripheral part to which heat or pressure is not applied, and moisture or the like readily enters this part. Therefore, a wiring line pattern below the insulating film at the boundary portion is apt to corrode.
Moreover, in recent years, miniaturization and high-definition have been demanded in a liquid crystal display panel. Therefore, the number of thin film transistors formed per unit area in a display region on a substrate has been increased. With this increase, the number of gate lines and drain lines connected with respective thin film transistors per unit area is also increased, and the number of many pulled-out wiring lines respectively connected with these gate lines and drain lines per unit area is also increased, which leads to a reduction in intervals of the pulled-out wiring lines. On the other hand, in order to reduce an area of a region in which the semiconductor device which drives gate lines or drain lines is mounted outside a display region on the substrate, one semiconductor device which can drive both gate electrodes and drain electrodes of the thin film transistors may be mounted in some cases (realization of a one-chip drive circuit). In a liquid crystal display panel in which intervals between the pulled-out wiring lines are narrowed and the one-chip drive circuit is adopted in this manner, the present inventors have confirmed that the above-described corrosion of the wiring lines is particularly apt to be generated. Such a problem is also confirmed in not only a transistor array circuit substrate including thin film transistors but also a passive matrix type circuit substrate and a display device including the passive matrix type circuit substrate.